Plastic chip carriers are typically comprised of an organic substrate, such as a polyimide, having areas of metallic circuitry and wire bond pads. One of the initial stages of the assembly of a chip carrier is typically a board-attach process, during which an organic substrate is attached to a lead frame by means of a thixotropic organic adhesive, such as, for example, an epoxy-based adhesive, an acrylic-based adhesive or a silicone. The adhesive is applied to the lead frame and the substrate is then placed onto the adhesive. The assembly may then be heated to assist in the cure of the adhesive, strengthening the attachment between the substrate and the lead frame. Similar adhesives and processes are used in later stages of device assembly, such as in a die-attach process when integrated circuit chips or devices are bonded to the chip carrier. Depending on the design of the chip carrier, it may not contain a lead frame. By necessity, a chip carrier will always contain a die and most commonly a back-bonded die which is interconnected via wire bonding.
Although the adhesives used during the various stages of device assembly are fairly viscous, they have a propensity to bleed and spread out away from the point of attachment. For example, during the board-attach process, resin from the adhesive often bleeds out from the periphery of the chip carrier attachment area, and spreads up the edges of the chip carrier onto the circuitized upper surface, where it can contaminate the wire bond pads and render them non-bondable. This condition will cause significant problems during later assembly steps when the bond sites are needed to complete necessary electrical connections. As the resin spreads away from the attachment area, it can contaminate not only the wire bond sites, but also any portions of a soldermask which may lie in the near vicinity.
The problems associated with adhesive resin bleed are even more pronounced when the chip carrier has been treated with a plasma containing oxygen and/or argon, prior to the application of the adhesive. Such plasma treatment is frequently employed to clean the wire bond sites and to roughen up the substrate surface prior to assembly of the semiconductor device.
Resin bleed is also encountered during other stages of semiconductor device assembly. For example, during the die-attach process, an electrically or non-electrically conductive adhesive is used, and it too, can bleed out along the periphery of the die attachment area and spread out over adjacent areas where electrical connections ultimately need to be made.
Various methods for reducing resin bleed have been developed. For example, the chip carrier surface may have a recess at the point of attachment of the die, such that the die and adhesive will be recessed below the adjoining areas o f the chip carrier where electrical bonding sites are located. As a drawback to this method, not all integrated circuit assemblies provide the option of a recessed cavity in the carrier surface. Very large scale integrated circuit (VLSI) assemblies, for example, require a large number of bonding sites and these are at the same level as the die attachment surface.
U.S. Pat. No. 5,409,863, issued Apr. 25, 1995, teaches a method for controlling adhesive spread during a die-attach process. This method incorporates a low profile barrier, such as a solder mask ring, into the chip carrier structure. The barrier surrounds the perimeter of the die attachment area, preventing the spread of adhesive resin onto the adjacent bonding sites on the chip carrier.
In light of the many problems associated with adhesive resin bleed, a substrate, such as a chip carrier, that is not subject to this phenomenon, and thus has enhanced wire bondability, is therefore desirable. Furthermore, because of this desirability, a method for rendering a substrate substantially n on-wettable to adhesive resin, and therefore not subject to resin bleed, is especially desirable.